Power tip: Filter for low-noise power supply
In this example, we consider a 570kHz buck regulator with a 12V input, 3V/5 amp output with a maximum output ripple requirement of 100 uVpp (40 dBuVpp). The magnitude of fundamental switching frequency at the switch node is on the order of 5 Vpp (135 dB uVpp), which translates to a needed attenuation of 95 dB. This is much more than the 60 dB that should be attempted from a single-stage filter due to the parasitic components of the passives. Once the decision to use a two-section filter (figure 1) is made, then the break frequencies and component choices need to be made.
In this design approach, the output inductor (L1) is first chosen from the ripple current allocation much like any buck regulator and the first filter capacitor (C1) is chosen to provide 60 dB of attenuation. The second stage will be heavily damped and will provide a modest 35 dB of attenuation. Also, the ratio of first stage (C1) to second stage capacitance (C2) will be set to 1:10. This accomplishes a number of things:
Splits the two-filter resonances
Makes the characteristic impedance of the second stage low, making damping easier
Concentrates the majority of output capacitors in the second stage, mitigating impact of additional load capacitance and providing good transient performance
Minimises peaking of second stage resonance to ease loop compensation design
Setting the peak-to-peak ripple current in first stage inductor equal to 1 amp (20 per cent of the rated output) makes the output inductor (L1) 6.8 uH, which has an impedance of 24 Ohms at the switching frequency. For the first stage to provide 60 dB of attenuation, the capacitor (C1) impedance needs to be approximately 24 milliohms at the switching frequency, which translates into around 10 uF. The established ratio of first-to-second stage capacitances sets the second stage capacitor (C2) to 100 uF or 2.8 milliohms of impedance at the fundamental. The inductor in the second stage (L2) is selected to give a little more than the needed 35 dB attenuation because the second stage is damped by RD. For 40 dB of attenuation, its impedance needs to be 240 milliohms, which equals an inductance of 68 nH. I used 220 nH to give some margin. Finally, the second stage filter should be damped. A starting point on the damping resistor (RD) sets its resistance equal to the second stage inductor impedance at the switching frequency.
Figure 1: This two-section filter provides 90 dB of well-damped attenuation.
This is a good place to use P-SPICE to examine how the component values affect performance. P-SPICE can be used to simulate the time domain ripple performance of the filter, as well as frequency domain characteristics of the control loop. Figure 2 provides the schematic of a time domain ripple simulation. The filter components and load are readily identifiable. Two sources (V1 and V2) are used to simulate the buck power stage. V2 sets the initial condition of 3V throughout the filter while V1 simulates that switching action of the power stage. The switching period is set to 1.75 usec for an approximate frequency of 570kHz and the on-time is set precisely to 25 per cent.
Figure 2: The schematic is used to simulate ripple performance.
Figure 3 provides the simulation results, which are similar to our first-pass calculations. This simulation can be further enhanced with the inclusion of parasitic components, such as ESR and ESL in the capacitors as well as distributed capacitances within the inductors. You will find that additional filtering will be needed, particularly when you add ESL to C2.
Figure 3: The simulation results correlate well with hand calculations.
This simulation was done somewhat with tongue-in-cheek, as it takes heroic efforts to actually tame the output noise of a switcher to the 100 uV level. Parasitic elements in the filter components and capacitive or inductive coupling into the second section of the filter could significantly degrade the simulated attenuation. It is also very likely that the second section, as well as the load, will need shielding from the remainder of the system. Additionally, feed through capacitors providing minimal ESL will need to be considered.
To summarise, P-SPICE can provide a good starting point on the design of a two-stage filter for a power supply output. In this article, we performed a time domain simulation to predict the output ripple voltage. We also proposed a design strategy to maximise the capacitance on the second stage and to damp that stage. In next month's article we will see how this strategy will help provide a wide power supply bandwidth and minimise the impact of additional capacitance that your customer may add to the output.
About the author
Robert Kollman is a Senior Applications Manager and Distinguished Member of Technical Staff at Texas Instruments. He has more than 30 years of experience in the power electronics business and has designed magnetics for power electronics ranging from sub-watt to sub-megawatt with operating frequencies into the megahertz range. Robert earned a BSEE from Texas A&M University, and a MSEE from Southern Methodist University.
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