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Address power, security issues with antifuse tech

Posted: 05 Nov 2012  Print Version  Bookmark and Share

Keywords:digital wallets  non-volatile memory  antifuse 

Wireless monitoring devices and digital wallets are generating a new category of battery-powered system-on-chip (SoC) designs. With embedded processing capability and wireless connectivity, these SoCs demand months or years of operation without recharge or battery swap. This article will examine the memory requirements—static RAM (SRAM), read only (ROM), and non-volatile memory (NVM)—of these SoCs and offer an innovative solution to accommodate the new constraints of this category of design.

The world market for remote monitoring services was worth more than $29 billion in 2011, equivalent to $2.4 billion in recurring monthly revenues (RMR) across the year, according to the IMS Research's report "The World Market for Remote Monitoring Service – 2012 Edition"1. The Wellingborough, England, Research Firm estimated that, in the same year, 54 million customer locations were provided with services such as alarm and remote video monitoring, physical access control and fire detection, and Personal Emergency Response Services. IMS Research also states that 14 million wearable devices were shipped in 2011 and the market is on track to generate a minimum revenue opportunity of $6 billion by 2016 in its "World Market for Wearable Technology—A Quantitative Market Assessment—2012"2 report.

Mobile financial transactions have experienced fits and start as financial institutions battled communications service providers and handset suppliers over who would do what. However, in the report, "Mobile Financial Services—A Technology and Market Analysis,"3 research firm Frost & Sullivan states that near field communications (NFC)-based mobile commerce is approaching a tipping point, thanks to more NFC-enabled mobile devices and growing partnerships between telecom service providers and financial institutions. These partnerships encourage semiconductor vendors, mobile device manufacturers, and mobile operators to proliferate more NFC-enabled mobile devices to the market.

Emerging design constraints
Two critical design elements will influence the functionality of wireless devices providing remote monitoring and financial transactions. Foremost is power as users will expect these devices to be always performing their tasks. Just as a leather wallet can be accessed as long as it has funds, NFC-enabled digital wallet must operate even if mobile phone power has run out. Users of remote monitoring devices will have the same instant-on expectation.

The second critical design element is security, both from non-invasive and invasive tampering as well as from remote attacks. Security concerns are obvious for financial transactions. Lost or stolen phones can be hacked to remove digital funds as well as the owner's identity; the same vulnerability exists from cyber hackers. Less obvious, but just as important to the OEM, are algorithm intellectual property theft and counterfeit prevention.

Remote monitoring devices are increasingly being wirelessly connected to the cloud, such as the Microsoft HealthVault that accepts health and fitness data from heart rate watches, blood pressure monitors, etc. As medical care begins treating more of the ageing population in homes rather than in hospitals, digital monitoring of patients' vital signs and prescription drug use will need to be secure. Hacking into a system where monitoring devices upload vital health information to the cloud leaves users vulnerable.

Figure 1: A typical wireless SoC design.

Challenging design requirements
An embedded design today might contain the elements shown in figure 1—an MCU with SRAM and an external EEPROM/Flash for firmware and data storage, creating significant power limitations in the design. The most obvious is the on-board SRAM, which continuously draws power to maintain stored data. At smaller process geometries, 65nm and below, for example, the SRAM drain is aggravated by the leaky nature of the processes themselves.

Placing the SRAM in non-retentive standby mode has measurable power and performance implications. Power loss from communicating with external devices is caused by the higher voltage and capacitance of the external interconnect (P=CV2F, where power P is equal to CV2F where C is capacitance, V is voltage and F is frequency). Restoring program code from external EEPROM or serial Flash every sleep exit takes too much time, eliminating the instant-on capability.

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