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ASIC processor surpasses 2.4GHz

Posted: 24 Sep 2010  Print Version  Bookmark and Share

Keywords:ASIC  processor  CPU 

Open-Silicon Inc., MIPS Technologies Inc. and Dolphin Technology have successfully taped out an ASIC processor at over 2.4GHz under typical conditions.

This performance, as measured in timing closure against TSMC reference flow signoff conditions, makes this one of the highest frequency ASIC processors ever built. It is a follow-on test chip to the 65nm, 1.1GHz test chip announced by Open-Silicon and MIPS Technologies at the end 2009.

The device contains a MIPS32 74Kf processor core, a superscalar, out-of-order (OoO) CPU with high-performance integrated Floating-Point-Unit (FPU), DSP extensions, 32K L1 instruction and 32K L1 data cache memories and on-chip 8K PDtrace memory buffer. The MIPS32 74K core is a fully synthesizable, licensable IP core with a 15-stage pipeline for achieving maximum frequencies, and is widely used in high-end digital CE, STBs and home networking solutions. As with the prior 65nm generation design, RTL design was done by MIPS Technologies, and implementation using the Dolphin memories was done by Open-Silicon. TSMC is fabricating the device using its CyberShuttle prototyping program.

To maximize the performance, Open-Silicon used its CoreMAX technology for design-specific library augmentation. For this design, 159 new LVt cells, 147 RVt, and 147 HVt cells were created by Open-Silicon to specifically optimize the critical paths inside the MIPS 74Kf core and FPU. Other advanced physical design techniques included Open-Silicon's experienced processor floorplanning, clock tree synthesis using useful skew, and timing-driven placement optimization. Cadence EDA layout tools were used for physical design.





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