Virage, SMIC extend partnership to 40nm
Under the terms of the new agreement, SoC designers will have access to Virage Logic's SiWare memory compilers, SiWare logic libraries, SiPro MIPI and Intelli DDR IP on SMIC's advanced 40nm LL process. One key provision of this new agreement provides SMIC access to Virage Logic's advanced STAR Memory System and STAR Yield Accelerator tools to accelerate the development, testing and yield enhancement of SMIC's 40nm LL memory related technology.
Chris Chi, senior VP and chief business officer at SMIC noted that "our expanded partnership with Virage Logic will enable SMIC to offer the industry leading semiconductor IP on our 40nm LL process to meet the needs of not only the Chinese SoC developers but the global semiconductor market." He added that "SMIC is taking aggressive steps to strengthen our technology offering to support our customers. Currently we have a number of customers with projects leveraging SMIC's 65nm LL node. The strategic IP agreement with Virage Logic will enable us to offer these customers an easy migration path to our 40nm LL process. As SMIC's business continues to expand, we look forward to continuing our synergistic relationship with Virage Logic to meet the increasing market demand."
Brani Buric, executive VP of marketing and sales for Virage Logic said "This joint agreement is a continuation of Virage Logic's strategy to expand its business through industry leading foundries and highlights SMIC's commitment to provide a complete IP solution for its customers."
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