Low-cost FPGAs support mainstream serial protocols

Altera Corp. has launched the latest Cyclone low-cost FPGA family, which adds support for mainstream serial protocols and offers a rich supply of logic, memory and DSP capabilities. The programmable logic vendor also rolled out version 9.1 of its Quartus II design software.

The Cyclone IV family offers two variants—Cyclone IV GX and Cyclone IV E. Cyclone IV GX devices have up to 150,000 logic elements (LEs), up to 6.5Mbits of RAM, up to 360 multipliers and up to eight integrated 3.125Gbit/s transceivers supporting mainstream protocols including Gigabit Ethernet, SDI, CPRI, V-by-One, Altera said.

Cyclone IV GXs offer low power consumption and packages as small as 11mm x 11mm for cost-sensitive, small form-factor applications in the wireless, wireline, broadcast, industrial and consumer markets. Cyclone IV GX smallest device is also claimed to be the smallest FPGA with transceivers, Altera said.

Cyclone IV E devices lower power by up to 25 percent compared to previous generation Cyclone products for power-sensitive applications such as handheld software-defined radio, according to the company.

Altera said it focused on reducing total system cost in creating the Cyclone IV GX devices. By integrating transceivers, Cyclone IV GX FPGAs eliminate external component costs and reduce power consumption up to 30 percent compared to previous generation Cyclone products combined with external transceiver PHYs, the company said.

This power savings also reduces costs by eliminating the need for heat-dissipation hardware, Altera said. Cyclone IV GX devices require only two power supplies, simplifying PCB design and reducing board space and cost, the company said.

A total of seven Cyclone IV GX and eight Cyclone IV E devices are planned for release. Production shipments of the EP4CGX15 and EP4C115E, the first Cyclone IV GX and Cyclone IV E devices, respectively, will begin in Q1 10, the company said. Budgetary pricing for the smallest devices, the EP4CE6 and the EP4CGX15, will start as low as $3 and $6, respectively, for 250,000-unit quantities in 2010.

Altera also added new features and enhancements in Quartus II version 9.1 that reduce compile times 20 percent versus the previous software release, while continuing to deliver on average two to three times compile times compared to competing high-density 40- and 65nm designs. New to the software is a Rapid Recompile feature, which improves compile times for small design changes, as well as support for the Cyclone IV devices.

Rapid Recompile maximizes designer productivity when making small engineering change order-style design changes after a full compile is run, reducing compilation times by 50 percent on average versus running another full compile on the design, according to Altera. Rapid Recompile also improves designer productivity during timing closure by preserving critical timing during late design changes, the company said.

Both the subscription edition and the free web edition of the Quartus II software version 9.1 are now available for download from Altera's Website. Quartus II software subscribers receive the ModelSim Altera starter edition and a full license to the IP Base Suite, which includes 14 of Altera's most popular IP (DSP and memory) cores, Altera said. The annual software subscription is $2,495 for a node-locked PC license, the company said.

- Dylan McGrath
Programmable Logic DesignLine

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Keywords: FPGA   DSP   Ethernet   serial protocol