Tensilica Inc. has unveiled the Xtensa LX3 high-performance dataplane
processor (DPU) core optimized for
DSP and control in the SoC dataplane.
The Xtensa LX3 DPU offers the a wide range of pre-verified DSP options, including ConnX D2 DSP, a new 16bit dual-MAC SIMD (single instruction multiple data) DSP for communications; ConnX Vectra LX DSP, an updated 16bit quad-MAC SIMD DSP for communications (with new option for single-load/store unit); Hi-Fi 2 audio DSP, a 24bit, dual-MAC audio processor; a 32bit IEEE-754 compliant single-precision floating point unit; and a new 64bit IEEE-754 compliant double-precision floating point accelerator.
The base Xtensa LX3 DPU configuration can reach speeds of more than 1GHz in 45nm process technology (45GS) with an area of 0.037mm² and power of 0.015mW/MHz. When built with the new ConnX Baseband Engine DSP (ConnX BBE), the Xtensa LX3 processor delivers more than 10 Giga-MACs/s performance, running at 625MHz with a footprint of 0.93mm² (post place-and-route 45GS) and consuming 170mW (including leakage).
The Xtensa LX3 DPU has been fine-tuned with optimized scripts for the latest generation of EDA tools to deliver even better speed-power-area results than the predecessor Xtensa LX2 cores. When comparing functionally equivalent configurations of the Xtensa LX3 DPU versus the prior generation Xtensa LX2 DPU, the new Xtensa LX3 processor delivers up to 15 percent faster clock speed, up to 20 percent smaller die area and up to 15 percent less power using identical process technologies and libraries, according to the company.
- Ismini Scouras
eeProductCenter
For application notes on processors click here.
Keywords:
processor
DSP
dataplane core
votes:
