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SiCortex tips x86 ASIC for HPC clusters
Author:Rick Merritt

Startup SiCortex settled on a custom system chip that integrates six MIPS Technologies 64-bit 5Kf cores running at up to 500MHz as well as a proprietary fabric switch architecture, two DDR memory controllers, a PCIe controller and 1.2MBytes of Level 2 cache.

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