Configuring and applying the MC74HC4046A phase-locked loop
Author: Cleon Petty, Gary Tharalson and Marten Smith
This application note is intended to show how to configure and apply the MC74HC4046A (HC4046A) PLL chip in a circuit design example with a reference frequency of 100kHz, an output frequency of 1MHz the center frequency and has the ability to move from 200kHz to 2MHz in 100kHz steps.
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